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ericlewis

ericlewis/openfpga-lunarlander

github.com/ericlewis/openfpga-lunarlander ↗
VHDL

Stars

⭐ 35

PRs Reviewed

2

Bot Comments

2

Primary Language

VHDL

Merge Rate

100.0%

Avg Time to Merge

30m

Avg Additions

+108

Avg Deletions

-104

Avg Files Changed

4

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